I am currently a security architect at Rivos and working on the security subsystem. Before that, I worked as a security researcher in the Secure Systems (SESYS) group of Prof. Stefan Mangard, where I obtained my Ph.D. My research interests include protecting general purpose software against fault attacks. In particular, my research focuses on the hardware-software codesign, comprising the modification of processor cores and developing compiler support, e.g., LLVM integration.
Interests
- System Security
- Fault Attacks and Countermeasures
- Hardware Design
- Web Security
Education
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PhD in Computer Science, 2023
Graz University of Technology
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MSc in Information and Computer Engineering, 2016
Graz University of Technology
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BSc in Information and Computer Engineering, 2013
Graz University of Technology
Recent Publications
Hardware Extensions and Compiler Support for Protection Against Fault Attacks
Multi-Tag: A Hardware-Software Co-Design for Memory Safety based on Multi-Granular Memory Tagging
SCFI: State Machine Control-Flow Hardening Against Fault Attacks
SFP: Providing System Call Flow Protection against Software and Fault Attacks
FIPAC: Thwarting Fault- and Software-Induced Control-Flow Attacks with ARM Pointer Authentication
Protecting Indirect Branches Against Fault Attacks Using ARM Pointer Authentication
SecWalk: Protecting Page Table Walks Against Fault Attacks
CrypTag: Thwarting Physical and Logical Memory Vulnerabilities using Cryptographically Colored Memory
HECTOR-V: A Heterogeneous CPU Architecture for a Secure RISC-V
ConTExT: A Generic Approach for Mitigating Spectre
Protecting RISC-V Processors against Physical Attacks
Securing Conditional Branches in the Presence of Fault Attacks
Small Faults Grow Up - Verification of Error Masking Robustness in Arithmetically Encoded Programs